1. Field of the Invention
The present invention relates generally to the field of semiconductor devices. Specifically, the invention relates to semiconductor devices having a dielectric layer and a diffusion barrier layer formed over the dielectric layer, and methods of manufacturing such semiconductor devices.
2. Description of Related Art
A known method of manufacturing a known semiconductor device having copper interconnect lines includes the step of forming a dielectric layer over a semiconductor substrate. The semiconductor substrate may include device layers which previously were manufactured on the substrate. The method also includes the step of etching a plurality of via structures or a plurality of trench structures into the dielectric layer. Because copper atoms diffuse readily into other materials, such known methods also include the step of forming a diffusion barrier layer, e.g., a metal diffusion barrier layer, over the dielectric layer. Known metal diffusion barrier layers may comprise Ta, Ti, TaN, TiN, W2N, or similar metal compounds which, when used in a layer of sufficient thickness, substantially reduces or prevents the diffusion of copper atoms from one material to another material. This method also includes the steps of forming a copper seed layer over the diffusion barrier layer, and forming an electroplated or otherwise deposited copper layer over the copper seed layer. Moreover, a portion of the copper seed layer, a portion of the copper plate layer, and a portion of the diffusion barrier layer subsequently are removed by a known, chemical-mechanical polishing process, and a stop etch layer may be formed over the exposed copper plate layer.
As a trend for developing semiconductor devices capable of operating at faster speeds continues, the interconnect lines, e.g., copper interconnect lines, have become a speed bottleneck for developing semiconductor devices capable of operating at faster speeds. When the dielectric constant of the dielectric layer employed in the semiconductor device decreases, the speed at which the semiconductor may operate may increase. Consequently, there has been an increased demand for a dielectric layer having a lower dielectric constant, e.g., about 4.0 or less. For example, in another known method of manufacturing a known semiconductor device, the dielectric layer, e.g., a silicon oxide dielectric layer, may be modified with organic ligands, e.g., organo-silicate glass, polymeric dielectric films, or the like, which may decrease the dielectric constant of the dielectric layer. However, adhesion between the modified dielectric layer and the metal diffusion barrier layer inherently may be weak. In yet another known method of manufacturing a known semiconductor device, a reactive metal, e.g., Ti or Cr, may be deposited on the modified dielectric layer by physical vapor deposition prior to forming the metal diffusion barrier layer over the modified dielectric layer. The reactive metal deposited on the modified dielectric layer may increase adhesion between the modified dielectric layer and the metal diffusion barrier layer. Nevertheless, for most semiconductor devices having copper interconnect lines and a dielectric layer with a low dielectric constant, e.g., about 4.0 or less, the depth of the trench structure or the via structure formed in the dielectric layer is greater than the width of the trench structure or the via structure, respectively. As such, when physical vapor deposition methods are used to deposit the reactive metal on the modified dielectric layer, it may be difficult to form a reactive barrier layer on the modified dielectric layer having a substantially level topography, e.g., the reactive barrier layer has a decreased step coverage. Consequently, the performance of the semiconductor device is degraded using these known methods of manufacturing such known semiconductor devices.